With the continuous increase of integrated components in radio frequency integrated circuits (RFICs), the sources of noise coupling are also increasing, so power management is particularly important. The impact that power supply noise can have on RFIC performance is described below. Although this article exemplifies the ADRF6820 quadrature demodulator with integrated phase-locked loop (PLL) and voltage-controlled oscillator (VCO), the results obtained are equally applicable to other high-performance RFICs.
Power supply noise creates mixing products in the demodulator, which can degrade linearity and adversely affect the phase noise performance in the PLL/VCO. This article describes the power supply evaluation scheme in detail and provides recommended power supply designs using low dropout regulators (LDOs) and switching regulators.
With its dual supplies and very high level of RF integration, the ADRF6820 is an ideal device to discuss. It uses an active mixing core similar to the ADL5380 quadrature demodulator and the same PLL/VCO core as the ADRF6720, so the information presented here can also be used for these devices. Alternatively, the power supply design can be used for newer designs that require a 3.3 V or 5.0 V supply with similar power dissipation.
The ADRF6820 quadrature demodulator and frequency synthesizer, shown in Figure 1, is ideal for next-generation communication systems. The feature-rich device includes a high-linearity wideband I/Q demodulator, an integrated fractional-N PLL, and a low phase noise multicore VCO. Also integrates a 2:1 RF switch, a tunable RF balun, a programmable RF attenuator, and two LDOs. This highly integrated RFIC is housed in a 6 mm × 6 mm LFCSP package
Power Sensitivity
The blocks most affected by power supply noise are the mixer core and frequency synthesizer. Noise coupled into the mixer core creates unwanted signals that degrade linearity and dynamic range as a result. This is especially important for quadrature demodulators because the low-frequency mixing products are within the frequency band of interest. Similarly, power supply noise can degrade the PLL/VCO phase noise performance. Unwanted mixing products and phase noise degradation are common problems with most mixers and frequency synthesizers, but the exact magnitude of the degradation depends on the chip's architecture and layout. Understanding these power supply sensitivities allows for the design of more robust power supplies that optimize performance and efficiency.
Quadrature Demodulator Sensitivity
The ADRF6820 uses a double balanced Gilbert cell active mixer core, as shown in Figure 2. Double balanced means that both the LO and RF ports are driven differentially.
After the filter rejects higher order harmonics, the resulting mixer output is the sum and difference of the RF and LO inputs. The difference term (also known as the IF frequency) is within the frequency band of interest and is the desired signal. The sum term is outside the frequency band and needs to be filtered.
Ideally, only the desired RF and LO signals would feed into the mixer core, but this is rarely the case. Power supply noise can couple into the mixer input and appear as mixing spurs. Depending on the source of the noise coupling, the relative magnitude of the mixing spurs can vary. Figure 3 shows an example mixer output spectrum where its mixing products with the desired signal also appear on the output spectrum due to power supply noise coupling. In the diagram, CW corresponds to a continuous wave or sinusoidal signal coupled to the supply line. For example, the noise could be clock noise from a 600 kHz or 1.2 MHz switching regulator. Power supply noise can cause two different problems; if the noise couples into the mixer output, a CW tone will appear at the output without any frequency conversion. If the coupling occurs at the mixer input, the CW tone will modulate the RF and LO signals and produce a product at IF ±CW.
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